VLSI System Design MCQ Quiz – Objective Question with Answer for VLSI System Design

11. During the relaxation effect, electron flow occurs in

A. short pulses
B. at a steady-state level
C. large pulses
D. very large pulses

12. Line impedance is given by

A. (L/C)²
B. (C/L)²
C. (L/C)^1/2
D. (C/L)^1/2

13. IR drops brings ______ in noise margin.

A. increase
B. decrease
C. does not affect
D. stabilization

14. In negative logic convention, the Boolean Logic [1] is equivalent to:

A. +VDD
B. 0 V
C. -VDD
D. None of the mentioned

15. In positive logic convention, the true state is represented as:

A. 1
B. 0
C. -1
D. -0

16. In a CMOS logic circuit the n-MOS transistor acts as:

A. Load
B. Pull up network
C. Pull down the network
D. Not used in CMOS circuits

17. In a CMOS logic circuit the p-MOS transistor acts as:

A. Pull down network
B. Pull up network
C. Load
D. Short to ground

18. In the CMOS logic circuit, the switching operation occurs because:

1. Both n-MOSFET and p-MOSFET turn OFF simultaneously for input ‘0’ and turn ON simultaneously for input ‘1’
2. Both n-MOSFET and p-MOSFET turn ON simultaneously for input ‘0’ and turns OFF simultaneously for input ‘1’
3. N-MOSFET transistor turns ON, and the p-MOSFET transistor turns OFF for input ‘1’ and the N-MOS transistor turns OFF, and the P-MOS transistor turns ON for input ‘0’
4. None of the mentioned

19. When both nMOS and pMOS transistors of CMOS logic design are in OFF condition, the output is:

A. 1 or Vdd or HIGH state
B. 0 or ground or LOW state
C. High impedance or floating(Z)
D. None of the mentioned

20. When both nMOS and pMOS transistors of CMOS logic gates are ON, the output is:

A. 1 or Vdd or HIGH state
B. 0 or ground or LOW state
C. Crowbarred or Contention(X)
D. None of the mentioned